TIME/MEM OUT/ERR | WRONG | SOLVED | WIN | UNIQUE | SUBOPTIMAL | NOT-RUN |
Problem | cvc5_mbqi | cvc5_str | cvc5_sygus | lmb | vam | vam_long | z3 | VBS |
---|---|---|---|---|---|---|---|---|
C10_gencover_const1 | 600 (sec) n |
299 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
588 (sec) n |
27 (sec) n |
600 (sec) n |
0 (sec) s sat |
C10_gencover_const2 | 600 (sec) n |
0 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
575 (sec) n |
30 (sec) n |
600 (sec) n |
0 (sec) s sat |
C10_gencover_lin1 | 601 (sec) n |
500 (sec) n |
600 (sec) n |
600 (sec) n |
7 (sec) s unsat |
1 (sec) s unsat |
0 (sec) n |
1 (sec) s unsat |
C10_gencover_lin2 | 0 (sec) s unsat |
200 (sec) s unsat |
600 (sec) n |
600 (sec) n |
7 (sec) s unsat |
0 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
C10_gencover_linmon1 | 601 (sec) n |
203 (sec) s unsat |
600 (sec) n |
600 (sec) n |
590 (sec) n |
30 (sec) n |
0 (sec) n |
203 (sec) s unsat |
C10_gencover_linmon2 | 150 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
6 (sec) s unsat |
0 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
C10_gencover_quad1 | 600 (sec) n |
500 (sec) n |
600 (sec) n |
600 (sec) n |
589 (sec) n |
28 (sec) n |
0 (sec) n |
600 (sec) n |
C10_gencover_quad2 | 601 (sec) n |
200 (sec) s unsat |
600 (sec) n |
600 (sec) n |
6 (sec) s unsat |
0 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
C10_gencover_quadmon1 | 601 (sec) n |
501 (sec) n |
600 (sec) n |
0 (sec) s sat |
590 (sec) n |
30 (sec) n |
0 (sec) n |
0 (sec) s sat |
C10_gencover_quadmon2 | 600 (sec) n |
300 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
570 (sec) n |
22 (sec) n |
0 (sec) n |
0 (sec) s sat |
C12_gencover_const1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
596 (sec) n |
596 (sec) n |
233 (sec) n |
0 (sec) s sat |
C12_gencover_const2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
582 (sec) n |
585 (sec) n |
362 (sec) n |
0 (sec) s sat |
C12_gencover_lin1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
581 (sec) n |
194 (sec) n |
600 (sec) n |
C12_gencover_lin2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
566 (sec) n |
598 (sec) n |
142 (sec) n |
600 (sec) n |
C12_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
586 (sec) n |
585 (sec) n |
159 (sec) n |
600 (sec) n |
C12_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
580 (sec) n |
590 (sec) n |
602 (sec) n |
600 (sec) n |
C12_gencover_quad1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
588 (sec) n |
599 (sec) n |
189 (sec) n |
600 (sec) n |
C12_gencover_quad2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
594 (sec) n |
575 (sec) n |
180 (sec) n |
600 (sec) n |
C12_gencover_quadmon1 | 453 (sec) n |
600 (sec) n |
284 (sec) s sat |
600 (sec) n |
582 (sec) n |
590 (sec) n |
285 (sec) n |
284 (sec) s sat |
C12_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
575 (sec) n |
30 (sec) n |
281 (sec) n |
0 (sec) s sat |
C13_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
568 (sec) n |
598 (sec) n |
601 (sec) n |
0 (sec) s sat |
C13_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
588 (sec) n |
29 (sec) n |
601 (sec) n |
0 (sec) s sat |
C13_gencover_lin1 | 454 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
549 (sec) n |
592 (sec) n |
601 (sec) n |
600 (sec) n |
C13_gencover_lin2 | 601 (sec) n |
400 (sec) n |
5 (sec) s sat |
600 (sec) n |
580 (sec) n |
568 (sec) n |
0 (sec) n |
5 (sec) s sat |
C13_gencover_linmon1 | 600 (sec) n |
401 (sec) n |
10 (sec) s sat |
600 (sec) n |
582 (sec) n |
598 (sec) n |
600 (sec) n |
10 (sec) s sat |
C13_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
3 (sec) s sat |
600 (sec) n |
591 (sec) n |
28 (sec) n |
0 (sec) n |
3 (sec) s sat |
C13_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
27 (sec) n |
0 (sec) n |
600 (sec) n |
C13_gencover_quad2 | 600 (sec) n |
400 (sec) n |
12 (sec) s sat |
600 (sec) n |
582 (sec) n |
572 (sec) n |
0 (sec) n |
12 (sec) s sat |
C13_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
595 (sec) n |
600 (sec) n |
0 (sec) n |
600 (sec) n |
C13_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
573 (sec) n |
578 (sec) n |
0 (sec) n |
0 (sec) s sat |
C1_gencover_const1 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
578 (sec) n |
30 (sec) n |
393 (sec) n |
600 (sec) n |
C1_gencover_const2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
585 (sec) n |
369 (sec) n |
312 (sec) n |
600 (sec) n |
C1_gencover_lin1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
579 (sec) n |
584 (sec) n |
388 (sec) n |
600 (sec) n |
C1_gencover_lin2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
568 (sec) n |
27 (sec) n |
482 (sec) n |
600 (sec) n |
C1_gencover_linmon1 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
575 (sec) n |
28 (sec) n |
245 (sec) n |
600 (sec) n |
C1_gencover_linmon2 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
562 (sec) n |
50 (sec) n |
435 (sec) n |
600 (sec) n |
C1_gencover_quad1 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
580 (sec) n |
107 (sec) n |
603 (sec) n |
600 (sec) n |
C1_gencover_quad2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
558 (sec) n |
92 (sec) n |
485 (sec) n |
600 (sec) n |
C1_gencover_quadmon1 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
590 (sec) n |
133 (sec) n |
579 (sec) n |
600 (sec) n |
C1_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
570 (sec) n |
25 (sec) n |
602 (sec) n |
600 (sec) n |
C2_gencover_const1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
577 (sec) n |
36 (sec) n |
175 (sec) n |
0 (sec) s sat |
C2_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
571 (sec) n |
30 (sec) n |
278 (sec) n |
0 (sec) s sat |
C2_gencover_lin1 | 600 (sec) n |
101 (sec) s unsat |
600 (sec) n |
601 (sec) n |
269 (sec) s unsat |
4 (sec) s unsat |
246 (sec) n |
4 (sec) s unsat |
C2_gencover_lin2 | 600 (sec) n |
0 (sec) s unsat |
600 (sec) n |
601 (sec) n |
8 (sec) s unsat |
2 (sec) s unsat |
209 (sec) n |
0 (sec) s unsat |
C2_gencover_linmon1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
581 (sec) n |
30 (sec) n |
217 (sec) n |
600 (sec) n |
C2_gencover_linmon2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
580 (sec) n |
24 (sec) n |
602 (sec) n |
0 (sec) s sat |
C2_gencover_quad1 | 600 (sec) n |
101 (sec) s unsat |
600 (sec) n |
600 (sec) n |
590 (sec) n |
31 (sec) n |
173 (sec) n |
101 (sec) s unsat |
C2_gencover_quad2 | 601 (sec) n |
7 (sec) s unsat |
601 (sec) n |
600 (sec) n |
582 (sec) n |
564 (sec) n |
382 (sec) n |
7 (sec) s unsat |
C2_gencover_quadmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
563 (sec) n |
22 (sec) n |
96 (sec) n |
600 (sec) n |
C2_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
583 (sec) n |
33 (sec) n |
602 (sec) n |
0 (sec) s sat |
C3_gencover_const1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
583 (sec) n |
29 (sec) n |
600 (sec) n |
600 (sec) n |
C3_gencover_const2 | 601 (sec) n |
401 (sec) n |
601 (sec) n |
600 (sec) n |
567 (sec) n |
26 (sec) n |
0 (sec) n |
600 (sec) n |
C3_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
592 (sec) n |
27 (sec) n |
600 (sec) n |
600 (sec) n |
C3_gencover_lin2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
579 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
C3_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
572 (sec) n |
28 (sec) n |
600 (sec) n |
600 (sec) n |
C3_gencover_linmon2 | 601 (sec) n |
402 (sec) n |
601 (sec) n |
600 (sec) n |
567 (sec) n |
28 (sec) n |
0 (sec) n |
600 (sec) n |
C3_gencover_quad1 | 601 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
566 (sec) n |
30 (sec) n |
600 (sec) n |
600 (sec) n |
C3_gencover_quad2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
588 (sec) n |
573 (sec) n |
0 (sec) n |
600 (sec) n |
C3_gencover_quadmon1 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
571 (sec) n |
29 (sec) n |
600 (sec) n |
600 (sec) n |
C3_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
557 (sec) n |
26 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_const1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
574 (sec) n |
91 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_const2 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
583 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
596 (sec) n |
529 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_linmon1 | 601 (sec) n |
402 (sec) n |
600 (sec) n |
600 (sec) n |
577 (sec) n |
585 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_linmon2 | 601 (sec) n |
402 (sec) n |
600 (sec) n |
601 (sec) n |
569 (sec) n |
57 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_quad1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
581 (sec) n |
27 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_quad2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
585 (sec) n |
588 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_quadmon1 | 600 (sec) n |
402 (sec) n |
600 (sec) n |
600 (sec) n |
572 (sec) n |
570 (sec) n |
0 (sec) n |
600 (sec) n |
C4_gencover_quadmon2 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
601 (sec) n |
578 (sec) n |
29 (sec) n |
0 (sec) n |
600 (sec) n |
C5_gencover_const1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
570 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
C5_gencover_const2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
571 (sec) n |
544 (sec) n |
0 (sec) n |
600 (sec) n |
C5_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
586 (sec) n |
34 (sec) n |
0 (sec) n |
600 (sec) n |
C5_gencover_lin2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
563 (sec) n |
30 (sec) n |
600 (sec) n |
600 (sec) n |
C5_gencover_linmon1 | 601 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
588 (sec) n |
25 (sec) n |
0 (sec) n |
600 (sec) n |
C5_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
25 (sec) n |
600 (sec) n |
600 (sec) n |
C5_gencover_quad1 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
579 (sec) n |
27 (sec) n |
0 (sec) n |
600 (sec) n |
C5_gencover_quad2 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
601 (sec) n |
581 (sec) n |
28 (sec) n |
600 (sec) n |
600 (sec) n |
C5_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
594 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
C5_gencover_quadmon2 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
564 (sec) n |
30 (sec) n |
600 (sec) n |
600 (sec) n |
C6_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
564 (sec) n |
28 (sec) n |
600 (sec) n |
0 (sec) s sat |
C6_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
576 (sec) n |
29 (sec) n |
600 (sec) n |
0 (sec) s sat |
C6_gencover_lin1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
580 (sec) n |
564 (sec) n |
601 (sec) n |
600 (sec) n |
C6_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
592 (sec) n |
29 (sec) n |
0 (sec) n |
600 (sec) n |
C6_gencover_linmon1 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
591 (sec) n |
576 (sec) n |
0 (sec) n |
600 (sec) n |
C6_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
589 (sec) n |
28 (sec) n |
0 (sec) n |
0 (sec) s sat |
C6_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
589 (sec) n |
27 (sec) n |
0 (sec) n |
600 (sec) n |
C6_gencover_quad2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
581 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
C6_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
573 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
C6_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
579 (sec) n |
28 (sec) n |
0 (sec) n |
0 (sec) s sat |
C7_gencover_const1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
568 (sec) n |
562 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_const2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
575 (sec) n |
592 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
581 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_lin2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
588 (sec) n |
584 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_linmon1 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
586 (sec) n |
34 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_linmon2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
587 (sec) n |
31 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_quad1 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
572 (sec) n |
586 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_quad2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
578 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
568 (sec) n |
28 (sec) n |
0 (sec) n |
600 (sec) n |
C7_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
587 (sec) n |
27 (sec) n |
0 (sec) n |
600 (sec) n |
C9a_gencover_quad2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
603 (sec) n |
587 (sec) n |
600 (sec) n |
0 (sec) n |
600 (sec) n |
C9a_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
6 (sec) s unsat |
0 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
U10_gencover_const1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
594 (sec) n |
593 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_const2 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
601 (sec) n |
582 (sec) n |
545 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
28 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
580 (sec) n |
581 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_linmon1 | 600 (sec) n |
402 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
303 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_linmon2 | 601 (sec) n |
401 (sec) n |
600 (sec) n |
601 (sec) n |
591 (sec) n |
590 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_quad1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
590 (sec) n |
568 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_quad2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
25 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_quadmon1 | 600 (sec) n |
402 (sec) n |
600 (sec) n |
600 (sec) n |
564 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U10_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
562 (sec) n |
507 (sec) n |
0 (sec) n |
600 (sec) n |
U11_gencover_const1 | 600 (sec) n |
200 (sec) n |
600 (sec) n |
601 (sec) n |
559 (sec) n |
596 (sec) n |
0 (sec) n |
600 (sec) n |
U11_gencover_const2 | 600 (sec) n |
0 (sec) n |
600 (sec) n |
601 (sec) n |
545 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U11_gencover_lin1 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
567 (sec) n |
549 (sec) n |
0 (sec) n |
600 (sec) n |
U11_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
593 (sec) n |
1 (sec) n |
600 (sec) n |
U11_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
584 (sec) n |
596 (sec) n |
0 (sec) n |
600 (sec) n |
U11_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
564 (sec) n |
599 (sec) n |
1 (sec) n |
600 (sec) n |
U11_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
553 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U11_gencover_quad2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
591 (sec) n |
596 (sec) n |
330 (sec) n |
600 (sec) n |
U11_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
575 (sec) n |
587 (sec) n |
0 (sec) n |
600 (sec) n |
U11_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
575 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U12_gencover_const1 | 454 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
586 (sec) n |
574 (sec) n |
16 (sec) n |
600 (sec) n |
U12_gencover_const2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
571 (sec) n |
582 (sec) n |
0 (sec) n |
600 (sec) n |
U12_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
589 (sec) n |
45 (sec) n |
600 (sec) n |
600 (sec) n |
U12_gencover_lin2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
553 (sec) n |
598 (sec) n |
601 (sec) n |
600 (sec) n |
U12_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
568 (sec) n |
594 (sec) n |
84 (sec) n |
600 (sec) n |
U12_gencover_linmon2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
573 (sec) n |
593 (sec) n |
7 (sec) n |
600 (sec) n |
U12_gencover_quad1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
570 (sec) n |
589 (sec) n |
600 (sec) n |
600 (sec) n |
U12_gencover_quad2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
576 (sec) n |
563 (sec) n |
601 (sec) n |
600 (sec) n |
U12_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
563 (sec) n |
576 (sec) n |
74 (sec) n |
600 (sec) n |
U12_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
567 (sec) n |
587 (sec) n |
8 (sec) n |
600 (sec) n |
U13_gencover_const1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
601 (sec) n |
579 (sec) n |
35 (sec) n |
179 (sec) n |
0 (sec) s sat |
U13_gencover_const2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
562 (sec) n |
34 (sec) n |
222 (sec) n |
0 (sec) s sat |
U13_gencover_lin1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
11 (sec) s unsat |
4 (sec) s unsat |
155 (sec) n |
4 (sec) s unsat |
U13_gencover_lin2 | 68 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
79 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
602 (sec) n |
0 (sec) s unsat |
U13_gencover_linmon1 | 454 (sec) n |
117 (sec) s unsat |
600 (sec) n |
600 (sec) n |
586 (sec) n |
30 (sec) n |
389 (sec) n |
117 (sec) s unsat |
U13_gencover_linmon2 | 5 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
7 (sec) s unsat |
2 (sec) s unsat |
6 (sec) s unsat |
265 (sec) n |
0 (sec) s unsat |
U13_gencover_quad1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
571 (sec) n |
31 (sec) n |
245 (sec) n |
600 (sec) n |
U13_gencover_quad2 | 600 (sec) n |
0 (sec) s unsat |
600 (sec) n |
601 (sec) n |
2 (sec) s unsat |
1 (sec) s unsat |
368 (sec) n |
0 (sec) s unsat |
U13_gencover_quadmon1 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
579 (sec) n |
31 (sec) n |
343 (sec) n |
600 (sec) n |
U13_gencover_quadmon2 | 601 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
593 (sec) n |
33 (sec) n |
239 (sec) n |
0 (sec) s sat |
U14_gencover_const1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
583 (sec) n |
35 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_const2 | 601 (sec) n |
401 (sec) n |
601 (sec) n |
600 (sec) n |
584 (sec) n |
584 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_lin1 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
569 (sec) n |
564 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_lin2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
588 (sec) n |
564 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
589 (sec) n |
573 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
592 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
570 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_quad2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
568 (sec) n |
593 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
596 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U14_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
574 (sec) n |
544 (sec) n |
0 (sec) n |
600 (sec) n |
U16_gencover_const1 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
587 (sec) n |
30 (sec) n |
600 (sec) n |
0 (sec) s sat |
U16_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
591 (sec) n |
31 (sec) n |
601 (sec) n |
0 (sec) s sat |
U16_gencover_lin1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
2 (sec) s unsat |
1 (sec) s unsat |
600 (sec) n |
1 (sec) s unsat |
U16_gencover_lin2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
0 (sec) s unsat |
0 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
U16_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
581 (sec) n |
27 (sec) n |
601 (sec) n |
0 (sec) s sat |
U16_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
573 (sec) n |
28 (sec) n |
0 (sec) n |
0 (sec) s sat |
U16_gencover_quad1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
580 (sec) n |
28 (sec) n |
0 (sec) n |
600 (sec) n |
U16_gencover_quad2 | 600 (sec) n |
500 (sec) n |
600 (sec) n |
600 (sec) n |
565 (sec) n |
31 (sec) n |
0 (sec) n |
600 (sec) n |
U16_gencover_quadmon1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
0 (sec) s sat |
559 (sec) n |
27 (sec) n |
0 (sec) n |
0 (sec) s sat |
U16_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
585 (sec) n |
30 (sec) n |
0 (sec) n |
0 (sec) s sat |
U17_gencover_const1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
589 (sec) n |
25 (sec) n |
536 (sec) n |
600 (sec) n |
U17_gencover_const2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
577 (sec) n |
579 (sec) n |
168 (sec) n |
600 (sec) n |
U17_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
569 (sec) n |
505 (sec) n |
601 (sec) n |
600 (sec) n |
U17_gencover_lin2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
578 (sec) n |
579 (sec) n |
0 (sec) n |
600 (sec) n |
U17_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
576 (sec) n |
505 (sec) n |
0 (sec) n |
600 (sec) n |
U17_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
579 (sec) n |
582 (sec) n |
0 (sec) n |
600 (sec) n |
U17_gencover_quad1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
585 (sec) n |
542 (sec) n |
0 (sec) n |
600 (sec) n |
U17_gencover_quad2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
563 (sec) n |
566 (sec) n |
0 (sec) n |
600 (sec) n |
U17_gencover_quadmon1 | 454 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
577 (sec) n |
589 (sec) n |
0 (sec) n |
600 (sec) n |
U17_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
594 (sec) n |
506 (sec) n |
0 (sec) n |
600 (sec) n |
U20_gencover_const1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
568 (sec) n |
25 (sec) n |
359 (sec) n |
0 (sec) s sat |
U20_gencover_const2 | 601 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
569 (sec) n |
597 (sec) n |
319 (sec) n |
0 (sec) s sat |
U20_gencover_lin1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
576 (sec) n |
585 (sec) n |
183 (sec) n |
600 (sec) n |
U20_gencover_lin2 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
601 (sec) n |
579 (sec) n |
28 (sec) n |
160 (sec) n |
600 (sec) n |
U20_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
577 (sec) n |
29 (sec) n |
208 (sec) n |
0 (sec) s sat |
U20_gencover_linmon2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
583 (sec) n |
593 (sec) n |
127 (sec) n |
0 (sec) s sat |
U20_gencover_quad1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
563 (sec) n |
597 (sec) n |
175 (sec) n |
600 (sec) n |
U20_gencover_quad2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
585 (sec) n |
28 (sec) n |
315 (sec) n |
600 (sec) n |
U20_gencover_quadmon1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
579 (sec) n |
23 (sec) n |
200 (sec) n |
600 (sec) n |
U20_gencover_quadmon2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
574 (sec) n |
28 (sec) n |
136 (sec) n |
0 (sec) s sat |
U23_gencover_const1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
589 (sec) n |
29 (sec) n |
601 (sec) n |
600 (sec) n |
U23_gencover_const2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
35 (sec) n |
0 (sec) n |
600 (sec) n |
U23_gencover_lin1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
590 (sec) n |
27 (sec) n |
601 (sec) n |
600 (sec) n |
U23_gencover_lin2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
586 (sec) n |
34 (sec) n |
0 (sec) n |
600 (sec) n |
U23_gencover_linmon1 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
577 (sec) n |
30 (sec) n |
600 (sec) n |
0 (sec) s sat |
U23_gencover_linmon2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
580 (sec) n |
27 (sec) n |
0 (sec) n |
0 (sec) s sat |
U23_gencover_quad1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
586 (sec) n |
29 (sec) n |
600 (sec) n |
600 (sec) n |
U23_gencover_quad2 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
582 (sec) n |
37 (sec) n |
0 (sec) n |
600 (sec) n |
U23_gencover_quadmon1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
561 (sec) n |
36 (sec) n |
600 (sec) n |
600 (sec) n |
U23_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
601 (sec) n |
579 (sec) n |
31 (sec) n |
0 (sec) n |
0 (sec) s sat |
U24_gencover_const1 | 600 (sec) n |
3 (sec) s unsat |
600 (sec) n |
600 (sec) n |
571 (sec) n |
27 (sec) n |
154 (sec) n |
3 (sec) s unsat |
U24_gencover_const2 | 600 (sec) n |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
572 (sec) n |
28 (sec) n |
160 (sec) n |
0 (sec) s unsat |
U24_gencover_lin1 | 600 (sec) n |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
573 (sec) n |
30 (sec) n |
243 (sec) n |
0 (sec) s unsat |
U24_gencover_lin2 | 600 (sec) n |
127 (sec) s unsat |
600 (sec) n |
600 (sec) n |
589 (sec) n |
26 (sec) n |
139 (sec) n |
127 (sec) s unsat |
U24_gencover_linmon1 | 601 (sec) n |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
585 (sec) n |
30 (sec) n |
159 (sec) n |
0 (sec) s unsat |
U24_gencover_linmon2 | 601 (sec) n |
133 (sec) s unsat |
600 (sec) n |
600 (sec) n |
568 (sec) n |
30 (sec) n |
244 (sec) n |
133 (sec) s unsat |
U24_gencover_quad1 | 600 (sec) n |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
581 (sec) n |
574 (sec) n |
167 (sec) n |
0 (sec) s unsat |
U24_gencover_quad2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
584 (sec) n |
30 (sec) n |
202 (sec) n |
600 (sec) n |
U24_gencover_quadmon1 | 600 (sec) n |
0 (sec) s unsat |
601 (sec) n |
600 (sec) n |
579 (sec) n |
28 (sec) n |
111 (sec) n |
0 (sec) s unsat |
U24_gencover_quadmon2 | 601 (sec) n |
1 (sec) s unsat |
600 (sec) n |
600 (sec) n |
574 (sec) n |
27 (sec) n |
246 (sec) n |
1 (sec) s unsat |
U25_gencover_const1 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
601 (sec) n |
593 (sec) n |
41 (sec) n |
202 (sec) n |
0 (sec) s sat |
U25_gencover_const2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
574 (sec) n |
35 (sec) n |
296 (sec) n |
0 (sec) s sat |
U25_gencover_lin1 | 455 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
558 (sec) n |
25 (sec) n |
191 (sec) n |
600 (sec) n |
U25_gencover_lin2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
580 (sec) n |
27 (sec) n |
209 (sec) n |
600 (sec) n |
U25_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
583 (sec) n |
27 (sec) n |
150 (sec) n |
600 (sec) n |
U25_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
26 (sec) n |
223 (sec) n |
600 (sec) n |
U25_gencover_quad1 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
565 (sec) n |
28 (sec) n |
138 (sec) n |
600 (sec) n |
U25_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
590 (sec) n |
30 (sec) n |
253 (sec) n |
600 (sec) n |
U25_gencover_quadmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
567 (sec) n |
27 (sec) n |
193 (sec) n |
600 (sec) n |
U25_gencover_quadmon2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
577 (sec) n |
36 (sec) n |
602 (sec) n |
0 (sec) s sat |
U26_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) n |
600 (sec) n |
577 (sec) n |
595 (sec) n |
1 (sec) n |
600 (sec) n |
U26_gencover_const2 | 0 (sec) s sat |
400 (sec) n |
0 (sec) n |
600 (sec) n |
583 (sec) n |
594 (sec) n |
0 (sec) n |
0 (sec) s sat |
U26_gencover_lin1 | 600 (sec) n |
400 (sec) n |
0 (sec) n |
600 (sec) n |
570 (sec) n |
582 (sec) n |
34 (sec) n |
600 (sec) n |
U26_gencover_lin2 | 601 (sec) n |
400 (sec) n |
0 (sec) n |
600 (sec) n |
587 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U26_gencover_linmon1 | 601 (sec) n |
400 (sec) n |
0 (sec) n |
600 (sec) n |
568 (sec) n |
27 (sec) n |
0 (sec) n |
600 (sec) n |
U26_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) n |
600 (sec) n |
583 (sec) n |
585 (sec) n |
0 (sec) n |
600 (sec) n |
U26_gencover_quad1 | 600 (sec) n |
400 (sec) n |
0 (sec) n |
600 (sec) n |
578 (sec) n |
590 (sec) n |
0 (sec) n |
600 (sec) n |
U26_gencover_quad2 | 600 (sec) n |
400 (sec) n |
0 (sec) n |
601 (sec) n |
575 (sec) n |
599 (sec) n |
0 (sec) n |
600 (sec) n |
U26_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
0 (sec) n |
601 (sec) n |
572 (sec) n |
579 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
U26_gencover_quadmon2 | 601 (sec) n |
101 (sec) n |
0 (sec) n |
601 (sec) n |
578 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U27_gencover_const1 | 600 (sec) n |
400 (sec) n |
1 (sec) s sat |
600 (sec) n |
580 (sec) n |
577 (sec) n |
0 (sec) n |
1 (sec) s sat |
U27_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
581 (sec) n |
598 (sec) n |
0 (sec) n |
0 (sec) s sat |
U27_gencover_lin1 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
588 (sec) n |
579 (sec) n |
0 (sec) n |
600 (sec) n |
U27_gencover_lin2 | 600 (sec) n |
400 (sec) n |
2 (sec) s sat |
600 (sec) n |
589 (sec) n |
593 (sec) n |
0 (sec) n |
2 (sec) s sat |
U27_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
190 (sec) s sat |
601 (sec) n |
572 (sec) n |
597 (sec) n |
0 (sec) n |
190 (sec) s sat |
U27_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
12 (sec) s sat |
600 (sec) n |
572 (sec) n |
597 (sec) n |
0 (sec) n |
12 (sec) s sat |
U27_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
555 (sec) n |
576 (sec) n |
0 (sec) n |
600 (sec) n |
U27_gencover_quad2 | 600 (sec) n |
400 (sec) n |
228 (sec) s sat |
600 (sec) n |
586 (sec) n |
554 (sec) n |
0 (sec) n |
228 (sec) s sat |
U27_gencover_quadmon1 | 454 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
576 (sec) n |
592 (sec) n |
0 (sec) n |
600 (sec) n |
U27_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
582 (sec) n |
579 (sec) n |
0 (sec) n |
0 (sec) s sat |
U2_gencover_const1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
564 (sec) n |
27 (sec) n |
239 (sec) n |
0 (sec) s sat |
U2_gencover_const2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
573 (sec) n |
31 (sec) n |
271 (sec) n |
0 (sec) s sat |
U2_gencover_lin1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
558 (sec) n |
29 (sec) n |
244 (sec) n |
600 (sec) n |
U2_gencover_lin2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
569 (sec) n |
538 (sec) n |
270 (sec) n |
600 (sec) n |
U2_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
577 (sec) n |
28 (sec) n |
226 (sec) n |
600 (sec) n |
U2_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
573 (sec) n |
573 (sec) n |
271 (sec) n |
600 (sec) n |
U2_gencover_quad1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
32 (sec) n |
605 (sec) n |
600 (sec) n |
U2_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
586 (sec) n |
29 (sec) n |
497 (sec) n |
600 (sec) n |
U2_gencover_quadmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
577 (sec) n |
29 (sec) n |
384 (sec) n |
600 (sec) n |
U2_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
598 (sec) n |
544 (sec) n |
226 (sec) n |
0 (sec) s sat |
U33_gencover_const1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
595 (sec) n |
583 (sec) n |
601 (sec) n |
600 (sec) n |
U33_gencover_const2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
558 (sec) n |
25 (sec) n |
600 (sec) n |
600 (sec) n |
U33_gencover_lin1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
570 (sec) n |
29 (sec) n |
601 (sec) n |
600 (sec) n |
U33_gencover_lin2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
574 (sec) n |
581 (sec) n |
0 (sec) n |
600 (sec) n |
U33_gencover_linmon1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
568 (sec) n |
597 (sec) n |
600 (sec) n |
600 (sec) n |
U33_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
567 (sec) n |
28 (sec) n |
0 (sec) n |
600 (sec) n |
U33_gencover_quad1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
587 (sec) n |
592 (sec) n |
600 (sec) n |
600 (sec) n |
U33_gencover_quad2 | 600 (sec) n |
500 (sec) n |
600 (sec) n |
600 (sec) n |
590 (sec) n |
592 (sec) n |
0 (sec) n |
600 (sec) n |
U33_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
569 (sec) n |
25 (sec) n |
601 (sec) n |
600 (sec) n |
U33_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
583 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U37_gencover_const1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
578 (sec) n |
597 (sec) n |
412 (sec) n |
600 (sec) n |
U37_gencover_const2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
584 (sec) n |
585 (sec) n |
375 (sec) n |
600 (sec) n |
U37_gencover_lin1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
595 (sec) n |
596 (sec) n |
602 (sec) n |
600 (sec) n |
U37_gencover_lin2 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
582 (sec) n |
591 (sec) n |
603 (sec) n |
600 (sec) n |
U37_gencover_linmon1 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
601 (sec) n |
567 (sec) n |
599 (sec) n |
537 (sec) n |
600 (sec) n |
U37_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
567 (sec) n |
29 (sec) n |
604 (sec) n |
600 (sec) n |
U37_gencover_quad1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
591 (sec) n |
574 (sec) n |
410 (sec) n |
600 (sec) n |
U37_gencover_quad2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
564 (sec) n |
568 (sec) n |
565 (sec) n |
600 (sec) n |
U37_gencover_quadmon1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
587 (sec) n |
27 (sec) n |
502 (sec) n |
600 (sec) n |
U37_gencover_quadmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
589 (sec) n |
29 (sec) n |
518 (sec) n |
600 (sec) n |
U39_gencover_const1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
577 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_const2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
578 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_lin1 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
565 (sec) n |
34 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_lin2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
563 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_linmon1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
587 (sec) n |
506 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
568 (sec) n |
573 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_quad1 | 601 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
588 (sec) n |
32 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_quad2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
581 (sec) n |
27 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_quadmon1 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
33 (sec) n |
0 (sec) n |
600 (sec) n |
U39_gencover_quadmon2 | 453 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
582 (sec) n |
580 (sec) n |
0 (sec) n |
600 (sec) n |
U3_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
578 (sec) n |
101 (sec) n |
600 (sec) n |
0 (sec) s sat |
U3_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
571 (sec) n |
30 (sec) n |
600 (sec) n |
0 (sec) s sat |
U3_gencover_lin1 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
0 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
0 (sec) s unsat |
U3_gencover_lin2 | 600 (sec) n |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
0 (sec) s unsat |
0 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
U3_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
578 (sec) n |
129 (sec) n |
600 (sec) n |
0 (sec) s sat |
U3_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
585 (sec) n |
30 (sec) n |
0 (sec) n |
0 (sec) s sat |
U3_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
578 (sec) n |
86 (sec) n |
0 (sec) n |
600 (sec) n |
U3_gencover_quad2 | 600 (sec) n |
0 (sec) s unsat |
601 (sec) n |
601 (sec) n |
6 (sec) s unsat |
0 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
U3_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
578 (sec) n |
87 (sec) n |
0 (sec) n |
0 (sec) s sat |
U3_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
571 (sec) n |
576 (sec) n |
0 (sec) n |
0 (sec) s sat |
U41_gencover_const1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
557 (sec) n |
30 (sec) n |
254 (sec) n |
600 (sec) n |
U41_gencover_const2 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
579 (sec) n |
26 (sec) n |
247 (sec) n |
600 (sec) n |
U41_gencover_lin1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
568 (sec) n |
595 (sec) n |
306 (sec) n |
600 (sec) n |
U41_gencover_lin2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
579 (sec) n |
29 (sec) n |
114 (sec) n |
600 (sec) n |
U41_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
571 (sec) n |
584 (sec) n |
277 (sec) n |
600 (sec) n |
U41_gencover_linmon2 | 601 (sec) n |
601 (sec) n |
1 (sec) s sat |
600 (sec) n |
574 (sec) n |
26 (sec) n |
160 (sec) n |
1 (sec) s sat |
U41_gencover_quad1 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
567 (sec) n |
26 (sec) n |
321 (sec) n |
600 (sec) n |
U41_gencover_quad2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
567 (sec) n |
29 (sec) n |
142 (sec) n |
600 (sec) n |
U41_gencover_quadmon1 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
584 (sec) n |
596 (sec) n |
293 (sec) n |
600 (sec) n |
U41_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
1 (sec) s sat |
600 (sec) n |
558 (sec) n |
28 (sec) n |
131 (sec) n |
1 (sec) s sat |
U42_gencover_const1 | 454 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
563 (sec) n |
29 (sec) n |
360 (sec) n |
0 (sec) s sat |
U42_gencover_const2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
586 (sec) n |
530 (sec) n |
156 (sec) n |
0 (sec) s sat |
U42_gencover_lin1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
580 (sec) n |
598 (sec) n |
352 (sec) n |
600 (sec) n |
U42_gencover_lin2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
562 (sec) n |
582 (sec) n |
603 (sec) n |
600 (sec) n |
U42_gencover_linmon1 | 601 (sec) n |
601 (sec) n |
601 (sec) n |
601 (sec) n |
581 (sec) n |
527 (sec) n |
310 (sec) n |
600 (sec) n |
U42_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
574 (sec) n |
31 (sec) n |
127 (sec) n |
0 (sec) s sat |
U42_gencover_quad1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
593 (sec) n |
30 (sec) n |
289 (sec) n |
600 (sec) n |
U42_gencover_quad2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
583 (sec) n |
585 (sec) n |
601 (sec) n |
600 (sec) n |
U42_gencover_quadmon1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
583 (sec) n |
97 (sec) n |
266 (sec) n |
600 (sec) n |
U42_gencover_quadmon2 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
593 (sec) n |
569 (sec) n |
222 (sec) n |
0 (sec) s sat |
U44_gencover_const1 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
579 (sec) n |
541 (sec) n |
0 (sec) n |
0 (sec) s sat |
U44_gencover_const2 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
579 (sec) n |
563 (sec) n |
0 (sec) n |
0 (sec) s sat |
U44_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
578 (sec) n |
581 (sec) n |
0 (sec) n |
600 (sec) n |
U44_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
588 (sec) n |
584 (sec) n |
0 (sec) n |
600 (sec) n |
U44_gencover_linmon1 | 454 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
583 (sec) n |
591 (sec) n |
0 (sec) n |
600 (sec) n |
U44_gencover_linmon2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
572 (sec) n |
551 (sec) n |
0 (sec) n |
600 (sec) n |
U44_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
537 (sec) n |
0 (sec) n |
600 (sec) n |
U44_gencover_quad2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
574 (sec) n |
580 (sec) n |
0 (sec) n |
600 (sec) n |
U44_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
568 (sec) n |
578 (sec) n |
0 (sec) n |
600 (sec) n |
U44_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
544 (sec) n |
588 (sec) n |
0 (sec) n |
600 (sec) n |
U45_gencover_const1 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
580 (sec) n |
572 (sec) n |
0 (sec) n |
0 (sec) s sat |
U45_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
594 (sec) n |
585 (sec) n |
0 (sec) n |
0 (sec) s sat |
U45_gencover_lin1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
542 (sec) n |
0 (sec) n |
600 (sec) n |
U45_gencover_lin2 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
601 (sec) n |
580 (sec) n |
29 (sec) n |
0 (sec) n |
600 (sec) n |
U45_gencover_linmon1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
567 (sec) n |
590 (sec) n |
0 (sec) n |
600 (sec) n |
U45_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
594 (sec) n |
44 (sec) n |
0 (sec) n |
600 (sec) n |
U45_gencover_quad1 | 601 (sec) n |
401 (sec) n |
601 (sec) n |
600 (sec) n |
541 (sec) n |
587 (sec) n |
0 (sec) n |
600 (sec) n |
U45_gencover_quad2 | 454 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
566 (sec) n |
32 (sec) n |
0 (sec) n |
600 (sec) n |
U45_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
582 (sec) n |
191 (sec) n |
0 (sec) n |
600 (sec) n |
U45_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
582 (sec) n |
569 (sec) n |
0 (sec) n |
0 (sec) s sat |
U48_gencover_const1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
593 (sec) n |
594 (sec) n |
139 (sec) n |
0 (sec) s sat |
U48_gencover_const2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
580 (sec) n |
596 (sec) n |
280 (sec) n |
0 (sec) s sat |
U48_gencover_lin1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
589 (sec) n |
552 (sec) n |
152 (sec) n |
600 (sec) n |
U48_gencover_lin2 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
572 (sec) n |
549 (sec) n |
284 (sec) n |
600 (sec) n |
U48_gencover_linmon1 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
588 (sec) n |
569 (sec) n |
134 (sec) n |
600 (sec) n |
U48_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
588 (sec) n |
593 (sec) n |
309 (sec) n |
600 (sec) n |
U48_gencover_quad1 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
576 (sec) n |
553 (sec) n |
146 (sec) n |
600 (sec) n |
U48_gencover_quad2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
591 (sec) n |
598 (sec) n |
394 (sec) n |
600 (sec) n |
U48_gencover_quadmon1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
580 (sec) n |
29 (sec) n |
158 (sec) n |
600 (sec) n |
U48_gencover_quadmon2 | 601 (sec) n |
601 (sec) n |
0 (sec) s sat |
601 (sec) n |
577 (sec) n |
28 (sec) n |
291 (sec) n |
0 (sec) s sat |
U49_gencover_const1 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
583 (sec) n |
597 (sec) n |
348 (sec) n |
0 (sec) s sat |
U49_gencover_const2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
590 (sec) n |
598 (sec) n |
120 (sec) n |
0 (sec) s sat |
U49_gencover_lin1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
558 (sec) n |
343 (sec) n |
600 (sec) n |
U49_gencover_lin2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
573 (sec) n |
598 (sec) n |
224 (sec) n |
600 (sec) n |
U49_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
566 (sec) n |
599 (sec) n |
326 (sec) n |
600 (sec) n |
U49_gencover_linmon2 | 601 (sec) n |
601 (sec) n |
601 (sec) n |
601 (sec) n |
579 (sec) n |
577 (sec) n |
140 (sec) n |
600 (sec) n |
U49_gencover_quad1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
573 (sec) n |
600 (sec) n |
332 (sec) n |
600 (sec) n |
U49_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
571 (sec) n |
595 (sec) n |
336 (sec) n |
600 (sec) n |
U49_gencover_quadmon1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
588 (sec) n |
582 (sec) n |
268 (sec) n |
600 (sec) n |
U49_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
601 (sec) n |
580 (sec) n |
596 (sec) n |
198 (sec) n |
0 (sec) s sat |
U50_gencover_const1 | 600 (sec) n |
600 (sec) n |
3 (sec) s sat |
600 (sec) n |
563 (sec) n |
29 (sec) n |
604 (sec) n |
3 (sec) s sat |
U50_gencover_const2 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
564 (sec) n |
28 (sec) n |
236 (sec) n |
0 (sec) s sat |
U50_gencover_lin1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
576 (sec) n |
26 (sec) n |
281 (sec) n |
600 (sec) n |
U50_gencover_lin2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
575 (sec) n |
586 (sec) n |
198 (sec) n |
600 (sec) n |
U50_gencover_linmon1 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
593 (sec) n |
31 (sec) n |
312 (sec) n |
600 (sec) n |
U50_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
564 (sec) n |
25 (sec) n |
273 (sec) n |
600 (sec) n |
U50_gencover_quad1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
20 (sec) n |
289 (sec) n |
600 (sec) n |
U50_gencover_quad2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
582 (sec) n |
594 (sec) n |
426 (sec) n |
600 (sec) n |
U50_gencover_quadmon1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
590 (sec) n |
28 (sec) n |
328 (sec) n |
600 (sec) n |
U50_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
576 (sec) n |
18 (sec) n |
144 (sec) n |
0 (sec) s sat |
U51_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
570 (sec) n |
592 (sec) n |
600 (sec) n |
0 (sec) s sat |
U51_gencover_const2 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
558 (sec) n |
28 (sec) n |
601 (sec) n |
0 (sec) s sat |
U51_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
576 (sec) n |
596 (sec) n |
601 (sec) n |
600 (sec) n |
U51_gencover_lin2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
590 (sec) n |
592 (sec) n |
600 (sec) n |
600 (sec) n |
U51_gencover_linmon1 | 150 (sec) s sat |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
570 (sec) n |
25 (sec) n |
600 (sec) n |
0 (sec) s sat |
U51_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
601 (sec) n |
575 (sec) n |
27 (sec) n |
601 (sec) n |
0 (sec) s sat |
U51_gencover_quad1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
565 (sec) n |
599 (sec) n |
601 (sec) n |
600 (sec) n |
U51_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
559 (sec) n |
596 (sec) n |
602 (sec) n |
600 (sec) n |
U51_gencover_quadmon1 | 150 (sec) s sat |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
572 (sec) n |
567 (sec) n |
601 (sec) n |
0 (sec) s sat |
U51_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
571 (sec) n |
527 (sec) n |
602 (sec) n |
0 (sec) s sat |
U54_gencover_const1 | 601 (sec) n |
400 (sec) n |
74 (sec) s sat |
600 (sec) n |
589 (sec) n |
28 (sec) n |
139 (sec) n |
74 (sec) s sat |
U54_gencover_const2 | 600 (sec) n |
400 (sec) n |
40 (sec) s sat |
600 (sec) n |
586 (sec) n |
25 (sec) n |
138 (sec) n |
40 (sec) s sat |
U54_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
578 (sec) n |
31 (sec) n |
156 (sec) n |
600 (sec) n |
U54_gencover_lin2 | 600 (sec) n |
600 (sec) n |
33 (sec) s sat |
600 (sec) n |
571 (sec) n |
29 (sec) n |
310 (sec) n |
33 (sec) s sat |
U54_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
277 (sec) s sat |
600 (sec) n |
580 (sec) n |
23 (sec) n |
281 (sec) n |
277 (sec) s sat |
U54_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
48 (sec) s sat |
601 (sec) n |
584 (sec) n |
596 (sec) n |
321 (sec) n |
48 (sec) s sat |
U54_gencover_quad1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
28 (sec) n |
271 (sec) n |
600 (sec) n |
U54_gencover_quad2 | 600 (sec) n |
600 (sec) n |
82 (sec) s sat |
600 (sec) n |
599 (sec) n |
30 (sec) n |
158 (sec) n |
82 (sec) s sat |
U54_gencover_quadmon1 | 601 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
570 (sec) n |
30 (sec) n |
191 (sec) n |
600 (sec) n |
U54_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
196 (sec) s sat |
600 (sec) n |
584 (sec) n |
30 (sec) n |
257 (sec) n |
196 (sec) s sat |
U56_gencover_const1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
583 (sec) n |
30 (sec) n |
183 (sec) n |
0 (sec) s sat |
U56_gencover_const2 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
601 (sec) n |
582 (sec) n |
593 (sec) n |
176 (sec) n |
0 (sec) s sat |
U56_gencover_lin1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
586 (sec) n |
595 (sec) n |
208 (sec) n |
600 (sec) n |
U56_gencover_lin2 | 601 (sec) n |
601 (sec) n |
601 (sec) n |
601 (sec) n |
567 (sec) n |
598 (sec) n |
203 (sec) n |
600 (sec) n |
U56_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
583 (sec) n |
27 (sec) n |
186 (sec) n |
600 (sec) n |
U56_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
5 (sec) s sat |
601 (sec) n |
573 (sec) n |
598 (sec) n |
190 (sec) n |
5 (sec) s sat |
U56_gencover_quad1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
575 (sec) n |
597 (sec) n |
297 (sec) n |
600 (sec) n |
U56_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
595 (sec) n |
597 (sec) n |
298 (sec) n |
600 (sec) n |
U56_gencover_quadmon1 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
577 (sec) n |
31 (sec) n |
192 (sec) n |
600 (sec) n |
U56_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
572 (sec) n |
592 (sec) n |
192 (sec) n |
0 (sec) s sat |
U57_gencover_const1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
585 (sec) n |
589 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_const2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
582 (sec) n |
564 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_lin1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
585 (sec) n |
31 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
553 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
590 (sec) n |
34 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
578 (sec) n |
61 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_quad1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
595 (sec) n |
545 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_quad2 | 601 (sec) n |
601 (sec) n |
601 (sec) n |
601 (sec) n |
598 (sec) n |
560 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
568 (sec) n |
31 (sec) n |
0 (sec) n |
600 (sec) n |
U57_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
585 (sec) n |
39 (sec) n |
0 (sec) n |
600 (sec) n |
U5_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
582 (sec) n |
28 (sec) n |
0 (sec) n |
0 (sec) s sat |
U5_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
585 (sec) n |
28 (sec) n |
0 (sec) n |
0 (sec) s sat |
U5_gencover_lin1 | 600 (sec) n |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
14 (sec) s unsat |
9 (sec) s unsat |
600 (sec) n |
0 (sec) s unsat |
U5_gencover_lin2 | 601 (sec) n |
0 (sec) s unsat |
600 (sec) n |
601 (sec) n |
496 (sec) s unsat |
6 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
U5_gencover_linmon1 | 601 (sec) n |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
499 (sec) s unsat |
9 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
U5_gencover_linmon2 | 600 (sec) n |
0 (sec) s unsat |
600 (sec) n |
600 (sec) n |
302 (sec) s unsat |
9 (sec) s unsat |
0 (sec) n |
0 (sec) s unsat |
U5_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
583 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U5_gencover_quad2 | 600 (sec) n |
100 (sec) s unsat |
601 (sec) n |
600 (sec) n |
4 (sec) s unsat |
9 (sec) s unsat |
0 (sec) n |
4 (sec) s unsat |
U5_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
573 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U5_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
577 (sec) n |
30 (sec) n |
0 (sec) n |
0 (sec) s sat |
U61_gencover_const1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
574 (sec) n |
595 (sec) n |
0 (sec) n |
600 (sec) n |
U61_gencover_const2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
564 (sec) n |
594 (sec) n |
0 (sec) n |
600 (sec) n |
U61_gencover_lin1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
573 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U61_gencover_lin2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
583 (sec) n |
597 (sec) n |
600 (sec) n |
600 (sec) n |
U61_gencover_linmon1 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U61_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
573 (sec) n |
599 (sec) n |
601 (sec) n |
600 (sec) n |
U61_gencover_quad1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
580 (sec) n |
574 (sec) n |
0 (sec) n |
600 (sec) n |
U61_gencover_quad2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
581 (sec) n |
598 (sec) n |
600 (sec) n |
600 (sec) n |
U61_gencover_quadmon1 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
569 (sec) n |
591 (sec) n |
0 (sec) n |
600 (sec) n |
U61_gencover_quadmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
590 (sec) n |
600 (sec) n |
600 (sec) n |
U62_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
582 (sec) n |
580 (sec) n |
394 (sec) n |
0 (sec) s sat |
U62_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
578 (sec) n |
42 (sec) n |
415 (sec) n |
0 (sec) s sat |
U62_gencover_lin1 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
578 (sec) n |
209 (sec) n |
540 (sec) n |
600 (sec) n |
U62_gencover_lin2 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
588 (sec) n |
30 (sec) n |
603 (sec) n |
600 (sec) n |
U62_gencover_linmon1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
38 (sec) n |
603 (sec) n |
600 (sec) n |
U62_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
590 (sec) n |
28 (sec) n |
602 (sec) n |
600 (sec) n |
U62_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
587 (sec) n |
29 (sec) n |
402 (sec) n |
600 (sec) n |
U62_gencover_quad2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
601 (sec) n |
591 (sec) n |
530 (sec) n |
366 (sec) n |
600 (sec) n |
U62_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
582 (sec) n |
27 (sec) n |
603 (sec) n |
600 (sec) n |
U62_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
570 (sec) n |
31 (sec) n |
602 (sec) n |
0 (sec) s sat |
U64_gencover_const1 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
582 (sec) n |
581 (sec) n |
134 (sec) n |
0 (sec) s sat |
U64_gencover_const2 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
576 (sec) n |
27 (sec) n |
273 (sec) n |
0 (sec) s sat |
U64_gencover_lin1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
585 (sec) n |
570 (sec) n |
138 (sec) n |
600 (sec) n |
U64_gencover_lin2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
588 (sec) n |
33 (sec) n |
236 (sec) n |
600 (sec) n |
U64_gencover_linmon1 | 601 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
579 (sec) n |
567 (sec) n |
114 (sec) n |
600 (sec) n |
U64_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
563 (sec) n |
31 (sec) n |
133 (sec) n |
600 (sec) n |
U64_gencover_quad1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
558 (sec) n |
562 (sec) n |
124 (sec) n |
600 (sec) n |
U64_gencover_quad2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
584 (sec) n |
588 (sec) n |
602 (sec) n |
600 (sec) n |
U64_gencover_quadmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
585 (sec) n |
584 (sec) n |
131 (sec) n |
600 (sec) n |
U64_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
601 (sec) n |
584 (sec) n |
26 (sec) n |
187 (sec) n |
0 (sec) s sat |
U66_gencover_const1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
561 (sec) n |
36 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_const2 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
569 (sec) n |
576 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
588 (sec) n |
29 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
586 (sec) n |
567 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_linmon1 | 601 (sec) n |
402 (sec) n |
600 (sec) n |
600 (sec) n |
567 (sec) n |
11 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_linmon2 | 600 (sec) n |
401 (sec) n |
601 (sec) n |
600 (sec) n |
585 (sec) n |
29 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
565 (sec) n |
28 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_quad2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
578 (sec) n |
35 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_quadmon1 | 600 (sec) n |
402 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
18 (sec) n |
0 (sec) n |
600 (sec) n |
U66_gencover_quadmon2 | 601 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
570 (sec) n |
43 (sec) n |
0 (sec) n |
600 (sec) n |
U67_gencover_const1 | 602 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
570 (sec) n |
25 (sec) n |
600 (sec) n |
600 (sec) n |
U67_gencover_const2 | 601 (sec) n |
601 (sec) n |
16 (sec) s sat |
600 (sec) n |
574 (sec) n |
579 (sec) n |
600 (sec) n |
16 (sec) s sat |
U67_gencover_lin1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
571 (sec) n |
597 (sec) n |
600 (sec) n |
600 (sec) n |
U67_gencover_lin2 | 601 (sec) n |
600 (sec) n |
4 (sec) s sat |
600 (sec) n |
588 (sec) n |
31 (sec) n |
601 (sec) n |
4 (sec) s sat |
U67_gencover_linmon1 | 0 (sec) s sat |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
596 (sec) n |
31 (sec) n |
601 (sec) n |
0 (sec) s sat |
U67_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
584 (sec) n |
511 (sec) n |
601 (sec) n |
0 (sec) s sat |
U67_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
553 (sec) n |
575 (sec) n |
600 (sec) n |
600 (sec) n |
U67_gencover_quad2 | 600 (sec) n |
600 (sec) n |
14 (sec) s sat |
601 (sec) n |
565 (sec) n |
580 (sec) n |
600 (sec) n |
14 (sec) s sat |
U67_gencover_quadmon1 | 0 (sec) s sat |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
573 (sec) n |
593 (sec) n |
601 (sec) n |
0 (sec) s sat |
U67_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
577 (sec) n |
36 (sec) n |
601 (sec) n |
0 (sec) s sat |
U68_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
586 (sec) n |
328 (sec) n |
0 (sec) n |
0 (sec) s sat |
U68_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
556 (sec) n |
184 (sec) n |
0 (sec) n |
0 (sec) s sat |
U68_gencover_lin1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
569 (sec) n |
591 (sec) n |
0 (sec) n |
600 (sec) n |
U68_gencover_lin2 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
563 (sec) n |
74 (sec) n |
0 (sec) n |
600 (sec) n |
U68_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
589 (sec) n |
123 (sec) n |
0 (sec) n |
600 (sec) n |
U68_gencover_linmon2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
575 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U68_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
564 (sec) n |
527 (sec) n |
0 (sec) n |
600 (sec) n |
U68_gencover_quad2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
586 (sec) n |
142 (sec) n |
0 (sec) n |
600 (sec) n |
U68_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
575 (sec) n |
584 (sec) n |
0 (sec) n |
600 (sec) n |
U68_gencover_quadmon2 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
570 (sec) n |
599 (sec) n |
0 (sec) n |
0 (sec) s sat |
U6_gencover_const1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
559 (sec) n |
596 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_const2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
599 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_lin1 | 601 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
545 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
588 (sec) n |
541 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
554 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
581 (sec) n |
550 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
539 (sec) n |
29 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_quad2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
568 (sec) n |
33 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
577 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U6_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
589 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U71_gencover_const1 | 15 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
17 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
601 (sec) n |
0 (sec) s unsat |
U71_gencover_const2 | 0 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
0 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
U71_gencover_lin1 | 16 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
18 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
601 (sec) n |
0 (sec) s unsat |
U71_gencover_lin2 | 0 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
0 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
268 (sec) n |
0 (sec) s unsat |
U71_gencover_linmon1 | 16 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
19 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
602 (sec) n |
0 (sec) s unsat |
U71_gencover_linmon2 | 14 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
11 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
361 (sec) n |
0 (sec) s unsat |
U71_gencover_quad1 | 16 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
17 (sec) s unsat |
0 (sec) s unsat |
1 (sec) s unsat |
601 (sec) n |
0 (sec) s unsat |
U71_gencover_quad2 | 1 (sec) s unsat |
0 (sec) s unsat |
600 (sec) n |
1 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
316 (sec) n |
0 (sec) s unsat |
U71_gencover_quadmon1 | 16 (sec) s unsat |
0 (sec) s unsat |
601 (sec) n |
19 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
601 (sec) n |
0 (sec) s unsat |
U71_gencover_quadmon2 | 10 (sec) s unsat |
1 (sec) s unsat |
601 (sec) n |
11 (sec) s unsat |
0 (sec) s unsat |
0 (sec) s unsat |
493 (sec) n |
0 (sec) s unsat |
U72_gencover_const1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
576 (sec) n |
586 (sec) n |
600 (sec) n |
600 (sec) n |
U72_gencover_const2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
598 (sec) n |
28 (sec) n |
600 (sec) n |
600 (sec) n |
U72_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
586 (sec) n |
598 (sec) n |
600 (sec) n |
600 (sec) n |
U72_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
550 (sec) n |
24 (sec) n |
0 (sec) n |
600 (sec) n |
U72_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
563 (sec) n |
597 (sec) n |
601 (sec) n |
0 (sec) s sat |
U72_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
579 (sec) n |
598 (sec) n |
0 (sec) n |
0 (sec) s sat |
U72_gencover_quad1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
576 (sec) n |
30 (sec) n |
600 (sec) n |
600 (sec) n |
U72_gencover_quad2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
560 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U72_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
564 (sec) n |
27 (sec) n |
600 (sec) n |
0 (sec) s sat |
U72_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
571 (sec) n |
30 (sec) n |
0 (sec) n |
0 (sec) s sat |
U76_gencover_const1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
579 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U76_gencover_const2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
578 (sec) n |
598 (sec) n |
30 (sec) n |
600 (sec) n |
U76_gencover_lin1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
585 (sec) n |
596 (sec) n |
2 (sec) n |
600 (sec) n |
U76_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
591 (sec) n |
0 (sec) n |
600 (sec) n |
U76_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
565 (sec) n |
572 (sec) n |
19 (sec) n |
600 (sec) n |
U76_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
565 (sec) n |
577 (sec) n |
0 (sec) n |
600 (sec) n |
U76_gencover_quad1 | 601 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
580 (sec) n |
599 (sec) n |
0 (sec) n |
600 (sec) n |
U76_gencover_quad2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
584 (sec) n |
599 (sec) n |
0 (sec) n |
600 (sec) n |
U76_gencover_quadmon1 | 600 (sec) n |
399 (sec) n |
601 (sec) n |
600 (sec) n |
583 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U76_gencover_quadmon2 | 601 (sec) n |
202 (sec) n |
600 (sec) n |
601 (sec) n |
579 (sec) n |
600 (sec) n |
0 (sec) n |
600 (sec) n |
U7_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
574 (sec) n |
36 (sec) n |
0 (sec) n |
0 (sec) s sat |
U7_gencover_const2 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
583 (sec) n |
560 (sec) n |
0 (sec) n |
0 (sec) s sat |
U7_gencover_lin1 | 455 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
586 (sec) n |
60 (sec) n |
600 (sec) n |
600 (sec) n |
U7_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
574 (sec) n |
574 (sec) n |
0 (sec) n |
600 (sec) n |
U7_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
563 (sec) n |
568 (sec) n |
0 (sec) n |
0 (sec) s sat |
U7_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
572 (sec) n |
586 (sec) n |
0 (sec) n |
0 (sec) s sat |
U7_gencover_quad1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
591 (sec) n |
587 (sec) n |
0 (sec) n |
600 (sec) n |
U7_gencover_quad2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
591 (sec) n |
0 (sec) n |
600 (sec) n |
U7_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
572 (sec) n |
588 (sec) n |
0 (sec) n |
600 (sec) n |
U7_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
568 (sec) n |
570 (sec) n |
0 (sec) n |
0 (sec) s sat |
U81_gencover_const1 | 600 (sec) n |
200 (sec) n |
600 (sec) n |
600 (sec) n |
572 (sec) n |
591 (sec) n |
0 (sec) n |
600 (sec) n |
U81_gencover_const2 | 601 (sec) n |
0 (sec) n |
600 (sec) n |
600 (sec) n |
592 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U81_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
579 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U81_gencover_lin2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
582 (sec) n |
597 (sec) n |
1 (sec) n |
600 (sec) n |
U81_gencover_linmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
567 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U81_gencover_linmon2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
567 (sec) n |
599 (sec) n |
1 (sec) n |
600 (sec) n |
U81_gencover_quad1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
590 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U81_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
579 (sec) n |
597 (sec) n |
15 (sec) n |
600 (sec) n |
U81_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
573 (sec) n |
590 (sec) n |
0 (sec) n |
600 (sec) n |
U81_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U87_gencover_const1 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
601 (sec) n |
582 (sec) n |
574 (sec) n |
601 (sec) n |
0 (sec) s sat |
U87_gencover_const2 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
589 (sec) n |
32 (sec) n |
0 (sec) n |
0 (sec) s sat |
U87_gencover_lin1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
581 (sec) n |
26 (sec) n |
601 (sec) n |
600 (sec) n |
U87_gencover_lin2 | 602 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
581 (sec) n |
31 (sec) n |
0 (sec) n |
600 (sec) n |
U87_gencover_linmon1 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
586 (sec) n |
576 (sec) n |
601 (sec) n |
600 (sec) n |
U87_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
572 (sec) n |
513 (sec) n |
0 (sec) n |
600 (sec) n |
U87_gencover_quad1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
567 (sec) n |
26 (sec) n |
601 (sec) n |
600 (sec) n |
U87_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
576 (sec) n |
591 (sec) n |
0 (sec) n |
600 (sec) n |
U87_gencover_quadmon1 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
593 (sec) n |
29 (sec) n |
601 (sec) n |
600 (sec) n |
U87_gencover_quadmon2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
573 (sec) n |
30 (sec) n |
0 (sec) n |
0 (sec) s sat |
U89_gencover_const1 | 454 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
580 (sec) n |
14 (sec) n |
602 (sec) n |
600 (sec) n |
U89_gencover_const2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
560 (sec) n |
592 (sec) n |
593 (sec) n |
600 (sec) n |
U89_gencover_lin1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
557 (sec) n |
581 (sec) n |
444 (sec) n |
600 (sec) n |
U89_gencover_lin2 | 601 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
586 (sec) n |
595 (sec) n |
276 (sec) n |
600 (sec) n |
U89_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
577 (sec) n |
598 (sec) n |
603 (sec) n |
600 (sec) n |
U89_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
554 (sec) n |
595 (sec) n |
228 (sec) n |
600 (sec) n |
U89_gencover_quad1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
589 (sec) n |
16 (sec) n |
603 (sec) n |
600 (sec) n |
U89_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
575 (sec) n |
14 (sec) n |
241 (sec) n |
600 (sec) n |
U89_gencover_quadmon1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
580 (sec) n |
18 (sec) n |
532 (sec) n |
600 (sec) n |
U89_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
553 (sec) n |
27 (sec) n |
242 (sec) n |
600 (sec) n |
U8_gencover_const1 | 601 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
591 (sec) n |
28 (sec) n |
262 (sec) n |
600 (sec) n |
U8_gencover_const2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
579 (sec) n |
30 (sec) n |
303 (sec) n |
600 (sec) n |
U8_gencover_lin1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
561 (sec) n |
33 (sec) n |
275 (sec) n |
600 (sec) n |
U8_gencover_lin2 | 454 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
580 (sec) n |
30 (sec) n |
243 (sec) n |
600 (sec) n |
U8_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
579 (sec) n |
28 (sec) n |
167 (sec) n |
600 (sec) n |
U8_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
566 (sec) n |
33 (sec) n |
258 (sec) n |
600 (sec) n |
U8_gencover_quad1 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
580 (sec) n |
569 (sec) n |
198 (sec) n |
600 (sec) n |
U8_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
574 (sec) n |
28 (sec) n |
121 (sec) n |
600 (sec) n |
U8_gencover_quadmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
579 (sec) n |
25 (sec) n |
178 (sec) n |
600 (sec) n |
U8_gencover_quadmon2 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
601 (sec) n |
587 (sec) n |
27 (sec) n |
269 (sec) n |
600 (sec) n |
U90_gencover_const1 | 600 (sec) n |
600 (sec) n |
13 (sec) s sat |
600 (sec) n |
583 (sec) n |
27 (sec) n |
601 (sec) n |
13 (sec) s sat |
U90_gencover_const2 | 601 (sec) n |
600 (sec) n |
2 (sec) s sat |
600 (sec) n |
591 (sec) n |
593 (sec) n |
600 (sec) n |
2 (sec) s sat |
U90_gencover_lin1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
581 (sec) n |
593 (sec) n |
2 (sec) n |
600 (sec) n |
U90_gencover_lin2 | 600 (sec) n |
600 (sec) n |
138 (sec) s sat |
600 (sec) n |
576 (sec) n |
29 (sec) n |
0 (sec) n |
138 (sec) s sat |
U90_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
220 (sec) s sat |
600 (sec) n |
580 (sec) n |
29 (sec) n |
600 (sec) n |
220 (sec) s sat |
U90_gencover_linmon2 | 600 (sec) n |
600 (sec) n |
121 (sec) s sat |
600 (sec) n |
573 (sec) n |
589 (sec) n |
0 (sec) n |
121 (sec) s sat |
U90_gencover_quad1 | 600 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
567 (sec) n |
26 (sec) n |
0 (sec) n |
600 (sec) n |
U90_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
601 (sec) n |
571 (sec) n |
581 (sec) n |
0 (sec) n |
600 (sec) n |
U90_gencover_quadmon1 | 601 (sec) n |
601 (sec) n |
600 (sec) n |
600 (sec) n |
592 (sec) n |
559 (sec) n |
233 (sec) n |
600 (sec) n |
U90_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
2 (sec) s sat |
600 (sec) n |
579 (sec) n |
32 (sec) n |
0 (sec) n |
2 (sec) s sat |
U91_gencover_const1 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
575 (sec) n |
25 (sec) n |
601 (sec) n |
0 (sec) s sat |
U91_gencover_const2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
585 (sec) n |
586 (sec) n |
602 (sec) n |
0 (sec) s sat |
U91_gencover_lin1 | 601 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
586 (sec) n |
595 (sec) n |
602 (sec) n |
600 (sec) n |
U91_gencover_lin2 | 0 (sec) s unsat |
201 (sec) s unsat |
601 (sec) n |
0 (sec) s unsat |
586 (sec) n |
23 (sec) n |
602 (sec) n |
0 (sec) s unsat |
U91_gencover_linmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
583 (sec) n |
594 (sec) n |
601 (sec) n |
600 (sec) n |
U91_gencover_linmon2 | 601 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
569 (sec) n |
40 (sec) n |
602 (sec) n |
0 (sec) s sat |
U91_gencover_quad1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
589 (sec) n |
577 (sec) n |
603 (sec) n |
600 (sec) n |
U91_gencover_quad2 | 0 (sec) s unsat |
200 (sec) s unsat |
600 (sec) n |
0 (sec) s unsat |
579 (sec) n |
51 (sec) n |
601 (sec) n |
0 (sec) s unsat |
U91_gencover_quadmon1 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
550 (sec) n |
29 (sec) n |
601 (sec) n |
600 (sec) n |
U91_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
600 (sec) n |
587 (sec) n |
30 (sec) n |
602 (sec) n |
0 (sec) s sat |
U92_gencover_const1 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
586 (sec) n |
0 (sec) n |
448 (sec) n |
0 (sec) s sat |
U92_gencover_const2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
601 (sec) n |
575 (sec) n |
0 (sec) n |
602 (sec) n |
0 (sec) s sat |
U92_gencover_lin1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
589 (sec) n |
577 (sec) n |
248 (sec) n |
600 (sec) n |
U92_gencover_lin2 | 600 (sec) n |
600 (sec) n |
601 (sec) n |
600 (sec) n |
593 (sec) n |
0 (sec) n |
600 (sec) n |
600 (sec) n |
U92_gencover_linmon1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
569 (sec) n |
70 (sec) n |
221 (sec) n |
600 (sec) n |
U92_gencover_linmon2 | 600 (sec) n |
601 (sec) n |
601 (sec) n |
600 (sec) n |
577 (sec) n |
0 (sec) n |
602 (sec) n |
600 (sec) n |
U92_gencover_quad1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
577 (sec) n |
593 (sec) n |
8 (sec) n |
600 (sec) n |
U92_gencover_quad2 | 600 (sec) n |
600 (sec) n |
600 (sec) n |
600 (sec) n |
572 (sec) n |
0 (sec) n |
603 (sec) n |
600 (sec) n |
U92_gencover_quadmon1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
580 (sec) n |
27 (sec) n |
8 (sec) n |
600 (sec) n |
U92_gencover_quadmon2 | 600 (sec) n |
601 (sec) n |
0 (sec) s sat |
600 (sec) n |
565 (sec) n |
0 (sec) n |
602 (sec) n |
0 (sec) s sat |
U93_gencover_const1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
601 (sec) n |
582 (sec) n |
594 (sec) n |
0 (sec) n |
600 (sec) n |
U93_gencover_const2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
577 (sec) n |
597 (sec) n |
0 (sec) n |
600 (sec) n |
U93_gencover_lin1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
571 (sec) n |
588 (sec) n |
2 (sec) n |
600 (sec) n |
U93_gencover_lin2 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
581 (sec) n |
596 (sec) n |
0 (sec) n |
600 (sec) n |
U93_gencover_linmon1 | 600 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
561 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U93_gencover_linmon2 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
577 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U93_gencover_quad1 | 601 (sec) n |
401 (sec) n |
600 (sec) n |
600 (sec) n |
582 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U93_gencover_quad2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
576 (sec) n |
599 (sec) n |
0 (sec) n |
600 (sec) n |
U93_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
601 (sec) n |
588 (sec) n |
598 (sec) n |
0 (sec) n |
600 (sec) n |
U93_gencover_quadmon2 | 600 (sec) n |
400 (sec) n |
601 (sec) n |
600 (sec) n |
558 (sec) n |
596 (sec) n |
0 (sec) n |
600 (sec) n |
U9_gencover_const1 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
601 (sec) n |
571 (sec) n |
29 (sec) n |
600 (sec) n |
0 (sec) s sat |
U9_gencover_const2 | 600 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
564 (sec) n |
29 (sec) n |
600 (sec) n |
0 (sec) s sat |
U9_gencover_lin1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
7 (sec) s unsat |
0 (sec) s unsat |
601 (sec) n |
0 (sec) s unsat |
U9_gencover_lin2 | 601 (sec) n |
3 (sec) s unsat |
600 (sec) n |
600 (sec) n |
2 (sec) s unsat |
4 (sec) s unsat |
0 (sec) n |
2 (sec) s unsat |
U9_gencover_linmon1 | 601 (sec) n |
400 (sec) n |
0 (sec) s sat |
600 (sec) n |
584 (sec) n |
30 (sec) n |
600 (sec) n |
0 (sec) s sat |
U9_gencover_linmon2 | 601 (sec) n |
600 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
571 (sec) n |
31 (sec) n |
0 (sec) n |
0 (sec) s sat |
U9_gencover_quad1 | 601 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
563 (sec) n |
588 (sec) n |
0 (sec) n |
600 (sec) n |
U9_gencover_quad2 | 600 (sec) n |
23 (sec) s unsat |
600 (sec) n |
601 (sec) n |
10 (sec) s unsat |
4 (sec) s unsat |
0 (sec) n |
4 (sec) s unsat |
U9_gencover_quadmon1 | 600 (sec) n |
400 (sec) n |
600 (sec) n |
600 (sec) n |
587 (sec) n |
30 (sec) n |
0 (sec) n |
600 (sec) n |
U9_gencover_quadmon2 | 600 (sec) n |
600 (sec) n |
0 (sec) s sat |
0 (sec) s sat |
572 (sec) n |
30 (sec) n |
0 (sec) n |
0 (sec) s sat |
TOTAL (602) | solved:21 wins:9 subopts:0 wrongs:0 uniq:1 |
solved:42 wins:35 subopts:0 wrongs:0 uniq:13 |
solved:143 wins:143 subopts:0 wrongs:0 uniq:124 |
solved:33 wins:24 subopts:0 wrongs:0 uniq:2 |
solved:34 wins:17 subopts:0 wrongs:0 uniq:0 |
solved:34 wins:26 subopts:0 wrongs:0 uniq:0 |
solved:2 wins:2 subopts:0 wrongs:0 uniq:1 |
solved:196 wins:196 subopts:0 wrongs:0 uniq:141 |
cvc5_mbqi | cvc5_str | cvc5_sygus | lmb | vam | vam_long | z3 | VBS |